Free A-Level Computer Science guide

Programming paradigms, LMC and addressing modes

A paradigm shapes how a solution is expressed. Assembly then shows how high-level behaviour becomes operations on a particular machine, while addressing modes specify where an operand comes from.

Content owner: Michael Print · Written for A-Level learners · Checked against official specifications

The idea to start with

Procedural programming organises instructions into reusable subroutines. Object-oriented programming groups state and behaviour into objects, with classes describing their attributes and methods. Functional and declarative approaches emphasise expressions or desired relationships/results rather than an explicit mutable-state sequence.

LMC provides a simplified accumulator machine. Addressing modes are a separate concept: immediate supplies a value, direct supplies its address, indirect supplies an address containing another address, and indexed combines a base with an index.

OCR H446 · 1.2.4(a–e); appendix 5d LMC instruction set

Before you start

Useful foundations

Sequence, selection and iteration
CPU registers, memory addresses and the accumulator

By the end, you should be able to

Compare procedural, object-oriented and other approaches
Explain classes, inheritance, encapsulation and polymorphism
Write/trace a bounded LMC program
Calculate operands using immediate, direct, indirect and indexed modes

Why several paradigms are useful

Procedural programs express an ordered sequence with variables, decisions, loops and named procedures/functions. A small file-conversion utility may naturally read a record, transform it and write it, with subroutines hiding repeated steps.

The state changes are explicit and easy to trace, but poorly managed global state can tightly couple unrelated procedures.

Object-oriented programs model interacting objects that own state and provide operations. This can suit a system containing related entities with distinct behaviour. Functional programming treats functions and expression evaluation as central, often limiting mutable state; this can help reasoning about transformations.

Declarative approaches, such as a query, describe a desired result while an implementation determines execution details. Languages can support more than one approach; the name of a language alone does not prove a program uses one paradigm.

The object-oriented vocabulary

A class defines attributes and methods; an object is an instance with its own state. A constructor establishes an object's initial state.

Encapsulation keeps representation controlled through operations, allowing a method to reject an invalid withdrawal rather than any part of the program changing a balance arbitrarily. A private attribute is an access rule in a language/model, not encryption.

Inheritance lets a subclass reuse/extend a superclass. For example, Bus inherits Vehicle's registration and adds capacity. A subclass can override a method.

Polymorphism allows the same operation to select behaviour appropriate to an object's concrete type: calling fare() on different Journey objects can calculate different fares. A shared method name without compatible expected behaviour is not sufficient design justification.

Prefer an is-a relationship for inheritance; a Garage containing Vehicles is a has-a relationship.

Read the LMC machine model

The Little Man Computer uses a PC, accumulator and numbered memory mailboxes holding instructions/data. LDA loads data into ACC, STA stores ACC, ADD/SUB use an addressed data value, INP takes an input and OUT outputs ACC.

BRA always branches, BRZ branches for zero, and BRP branches for a non-negative result under the usual LMC convention. HLT ends execution and DAT reserves a data mailbox. Labels identify addresses; the assembler resolves them.

LMC simulators vary in signed-value, overflow and negative-flag behaviour. State a bounded input range that avoids ambiguous arithmetic. Our program uses integer inputs 0–997 and adds 2, giving outputs 2–999. It does not depend on overflow or negative representation.

LMC's basic data operations use direct addresses; immediate/indirect/indexed examples below belong to a generic machine and are not invented extra OCR LMC instructions.

Four modes: follow the level of indirection

The symbols in this diagram are our illustrative convention, not universal assembly syntax. These are generic-machine addressing modes, separate from the direct-address operations of OCR LMC.

Indexed addressing is useful for contiguous array elements. With base 20 and index 3, a unit-sized element uses address 23. Larger elements may require scaling: use the stated addressing rule.

Follow the operand to its value

Immediate: LOAD #20: The operand is the literal value. Load 20.
Direct: LOAD 20: The operand names one address. Load memory[20].
Indirect: LOAD @20: The first location contains the effective address. Load memory[memory[20]]: two separate lookups.
Indexed: base + index: Add the index register to the base operand to form the effective address, then load its contents.

An address is not its contents. Show every lookup when tracing indirect addressing.

Worked example

LMC: add two and save the result

Save this source in an LMC assembler/simulator using the OCR mnemonics. Read an integer from 0 to 997; other inputs are outside this program's precondition.
For input 4, INP makes ACC=4; ADD TWO reads data value 2, producing ACC=6; STA RESULT writes 6 into the result mailbox; OUT displays 6; HLT stops. Input 0 outputs 2; input 997 outputs 999.
Assume instructions occupy addresses 0–4, TWO is mailbox 5, and RESULT is mailbox 6. DAT locations are data; the PC never reaches them because HLT executes first.

Trace for input 4; PC is the next instruction address
Executed	PC	ACC	memory[6]	Output
INP	1	4	0	—
ADD TWO	2	6	0	—
STA RESULT	3	6	6	—
OUT	4	6	6	6
HLT	Stopped	6	6	—

Original LMC assembly: bounded additiontext

        INP
        ADD TWO
        STA RESULT
        OUT
        HLT
TWO     DAT 2
RESULT  DAT 0

Worked example

LMC: a conditional countdown loop

Input is an integer from 0 to 9. Mailboxes 0–8 contain instructions, ONE is 9 and COUNT is 10. Output the input and every smaller non-negative integer, ending at zero.
For input 3, INP/STA store 3. LDA/OUT display it. BRZ is not taken, so SUB ONE reduces ACC to 2, STA saves 2 and BRA returns to LOOP at address 2.
Repeat for 2 and 1. When OUT displays 0, BRZ takes the branch to DONE at address 8 before SUB can create a negative value. HLT prevents executing data mailboxes.
Input 0 outputs only 0 and stops on the first test. COUNT decreases once on each nonzero iteration; the zero branch gives termination.

Selected events for input 3; PC is the next instruction address
Executed	PC	ACC	COUNT	Effect
OUT, first iteration	4	3	3	Display 3
BRZ DONE	5	3	3	Zero test false
SUB ONE; STA COUNT	7	2	2	Save decrement
BRA LOOP	2	2	2	Repeat
OUT, final iteration	4	0	0	Display 0
BRZ DONE	8	0	0	Zero test true
HLT	Stopped	0	0	Stop before data

Original LMC assembly: selection and repetitiontext

        INP
        STA COUNT
LOOP    LDA COUNT
        OUT
        BRZ DONE
        SUB ONE
        STA COUNT
        BRA LOOP
DONE    HLT
ONE     DAT 1
COUNT   DAT 0

Worked example

Why BRP cannot replace the countdown's zero test

Use an LMC implementation where BRP branches when the accumulator is non-negative, including zero. Change only BRZ DONE to BRP DONE in the countdown program.
For input 3, LDA and OUT leave ACC=3. BRP therefore jumps from address 4 to DONE at address 8 immediately. HLT stops: the only output is 3, and COUNT still holds 3.
For input 0, the branch is also taken and the only output is 0. This boundary passes, but every positive permitted input stops before decrementing, so the altered program fails the intended full countdown.
A conditional branch must match the algorithm's stopping rule. BRZ recognises the exact zero boundary; BRP recognises a wider set of accumulator values under the stated convention.

Worked example

Resolve the same operand in four ways

Assume memory[20]=40, memory[23]=11 and memory[40]=9; index register = 3. Use one-address-unit elements.
Immediate operand 20 gives value 20. Direct operand 20 gives value 40. Indirect operand 20 first reads address 40, then reads value 9 there. Indexed base 20 uses effective address 23 and reads value 11.
Immediate addressing needs no data-memory read for its literal; indirect addressing in this model needs two. Actual caches and hardware can affect physical timing, so this is a conceptual lookup count.

Generic addressing modes; symbols defined in the text
Mode	Effective data address	Loaded value
Immediate #20	Literal; none	20
Direct 20	20	40
Indirect @20	40	9
Indexed 20 + index	23	11

Worked example

Recognise object behaviour

A base class Account defines a private balance and public deposit/withdraw operations. A SavingsAccount can inherit these and add an interest rate.
An overridden charge() can calculate different fees for SavingsAccount and BusinessAccount. Calling account.charge() through a common interface is polymorphic when the object's type determines the implementation.
The withdraw method checks amount and balance before changing state. This encapsulates the rule; merely writing balance in a class without controlled operations does not protect the invariant.

Original A-Level practice

7 original questions total 25 marks. Attempt each before opening the independently written indicative marking guidance.

Question 1

3 marks

Explain two reasons to use procedural subroutines and one risk of shared global variables.

Show solution and marking guidance

Indicative answer

1 mark: subroutines reuse a repeated operation.
1 mark: they divide work into independently understandable/testable components.
1 mark: global changes can affect unrelated operations and create hidden dependencies.

Question 2

3 marks

Trace the shown LMC program for input 7. State the output, saved result and a suitable upper boundary test.

Show solution and marking guidance

Indicative answer

1 mark: output is 9.
1 mark: RESULT contains 9 after STA.
1 mark: input 997 should produce/save 999 without overflow; input 998 is outside the stated precondition.

Question 3

3 marks

Replace BRZ DONE with BRP DONE in the countdown, using the convention that BRP includes zero. State the outputs for inputs 3 and 0, and explain why the altered program fails its countdown requirement.

Show solution and marking guidance

Indicative answer

Input 3 outputs only 3 because BRP is taken before SUB (1).
Input 0 outputs only 0 because zero also satisfies the stated BRP condition (1).
All positive inputs stop on their first test, missing the smaller numbers down to zero; one passing zero boundary does not establish correctness (1).

Question 4

4 marks

Write an LMC program that inputs an integer 0–998, adds 1 and outputs the result, then stops.

Show solution and marking guidance

Indicative answer

1 mark: INP reads into ACC.
1 mark: ADD ONE uses a labelled mailbox ONE DAT 1.
1 mark: OUT displays ACC.
1 mark: HLT stops before the data mailbox. One valid sequence is INP; ADD ONE; OUT; HLT; ONE DAT 1.

Question 5

5 marks

Trace the countdown LMC program for input 2. Explain how its conditional and unconditional branches cooperate, including the input-zero boundary.

Show solution and marking guidance

Indicative answer

Output is 2,1,0 (1).
BRZ is not taken while ACC is positive, allowing SUB/STA to reduce COUNT (1).
BRA returns to LOOP to reload/output the updated value (1).
When zero is output, BRZ jumps to HLT before subtraction; COUNT remains zero (1).
Input zero outputs only zero and stops on the first test (1).

Question 6

4 marks

memory[10]=30, memory[14]=8, memory[30]=6 and index=4. Give the values loaded with operand/base 10 in all four modes.

Show solution and marking guidance

Indicative answer

1 mark: immediate gives 10.
1 mark: direct gives 30.
1 mark: indirect gives 6 from address 30.
1 mark: indexed gives 8 from address 10+4=14, under the stated unit-sized convention.

Question 7

3 marks

Bus inherits Vehicle and overrides describe(). Explain inheritance, encapsulation and polymorphism in this design.

Show solution and marking guidance

Indicative answer

1 mark: Bus reuses/extends Vehicle's attributes/methods.
1 mark: controlled methods/private state enforce valid changes, if defined; inheritance alone does not establish encapsulation.
1 mark: describe() selects Bus's overridden behaviour for a Bus object through the shared interface.

Specification and references

This guide addresses OCR H446 1.2.4(a–e); appendix 5d LMC instruction set. Check your examination year and the complete specification for the assessment scope.

These are independently written explanations and practice questions. CompSciTutoring.co.uk is not affiliated with or endorsed by an examination board. The marking guidance is indicative; always check the syllabus for your examination year.

Found an error? Email a correction.

Need help applying this to unfamiliar questions?

Use the free examples first, then explore one-to-one tuition if guided practice would help.

Explore tuition Email Michael

Free A-Level Computer Science guide

Programming paradigms, LMC and addressing modes

A paradigm shapes how a solution is expressed. Assembly then shows how high-level behaviour becomes operations on a particular machine, while addressing modes specify where an operand comes from.

Content owner: Michael Print · Written for A-Level learners · Checked against official specifications

The idea to start with

OCR H446 · 1.2.4(a–e); appendix 5d LMC instruction set

Before you start

Useful foundations

Sequence, selection and iteration
CPU registers, memory addresses and the accumulator

By the end, you should be able to

Compare procedural, object-oriented and other approaches
Explain classes, inheritance, encapsulation and polymorphism
Write/trace a bounded LMC program
Calculate operands using immediate, direct, indirect and indexed modes

Why several paradigms are useful

The state changes are explicit and easy to trace, but poorly managed global state can tightly couple unrelated procedures.

The object-oriented vocabulary

A class defines attributes and methods; an object is an instance with its own state. A constructor establishes an object's initial state.

Inheritance lets a subclass reuse/extend a superclass. For example, Bus inherits Vehicle's registration and adds capacity. A subclass can override a method.

Prefer an is-a relationship for inheritance; a Garage containing Vehicles is a has-a relationship.

Read the LMC machine model

LMC's basic data operations use direct addresses; immediate/indirect/indexed examples below belong to a generic machine and are not invented extra OCR LMC instructions.

Four modes: follow the level of indirection

The symbols in this diagram are our illustrative convention, not universal assembly syntax. These are generic-machine addressing modes, separate from the direct-address operations of OCR LMC.

Indexed addressing is useful for contiguous array elements. With base 20 and index 3, a unit-sized element uses address 23. Larger elements may require scaling: use the stated addressing rule.

Follow the operand to its value

Immediate: LOAD #20: The operand is the literal value. Load 20.
Direct: LOAD 20: The operand names one address. Load memory[20].
Indirect: LOAD @20: The first location contains the effective address. Load memory[memory[20]]: two separate lookups.
Indexed: base + index: Add the index register to the base operand to form the effective address, then load its contents.

An address is not its contents. Show every lookup when tracing indirect addressing.

Worked example

LMC: add two and save the result

Save this source in an LMC assembler/simulator using the OCR mnemonics. Read an integer from 0 to 997; other inputs are outside this program's precondition.
For input 4, INP makes ACC=4; ADD TWO reads data value 2, producing ACC=6; STA RESULT writes 6 into the result mailbox; OUT displays 6; HLT stops. Input 0 outputs 2; input 997 outputs 999.
Assume instructions occupy addresses 0–4, TWO is mailbox 5, and RESULT is mailbox 6. DAT locations are data; the PC never reaches them because HLT executes first.

Trace for input 4; PC is the next instruction address
Executed	PC	ACC	memory[6]	Output
INP	1	4	0	—
ADD TWO	2	6	0	—
STA RESULT	3	6	6	—
OUT	4	6	6	6
HLT	Stopped	6	6	—

Original LMC assembly: bounded additiontext

        INP
        ADD TWO
        STA RESULT
        OUT
        HLT
TWO     DAT 2
RESULT  DAT 0

Worked example

LMC: a conditional countdown loop

Input is an integer from 0 to 9. Mailboxes 0–8 contain instructions, ONE is 9 and COUNT is 10. Output the input and every smaller non-negative integer, ending at zero.
For input 3, INP/STA store 3. LDA/OUT display it. BRZ is not taken, so SUB ONE reduces ACC to 2, STA saves 2 and BRA returns to LOOP at address 2.
Repeat for 2 and 1. When OUT displays 0, BRZ takes the branch to DONE at address 8 before SUB can create a negative value. HLT prevents executing data mailboxes.
Input 0 outputs only 0 and stops on the first test. COUNT decreases once on each nonzero iteration; the zero branch gives termination.

Selected events for input 3; PC is the next instruction address
Executed	PC	ACC	COUNT	Effect
OUT, first iteration	4	3	3	Display 3
BRZ DONE	5	3	3	Zero test false
SUB ONE; STA COUNT	7	2	2	Save decrement
BRA LOOP	2	2	2	Repeat
OUT, final iteration	4	0	0	Display 0
BRZ DONE	8	0	0	Zero test true
HLT	Stopped	0	0	Stop before data

Original LMC assembly: selection and repetitiontext

        INP
        STA COUNT
LOOP    LDA COUNT
        OUT
        BRZ DONE
        SUB ONE
        STA COUNT
        BRA LOOP
DONE    HLT
ONE     DAT 1
COUNT   DAT 0

Worked example

Why BRP cannot replace the countdown's zero test

Use an LMC implementation where BRP branches when the accumulator is non-negative, including zero. Change only BRZ DONE to BRP DONE in the countdown program.
For input 3, LDA and OUT leave ACC=3. BRP therefore jumps from address 4 to DONE at address 8 immediately. HLT stops: the only output is 3, and COUNT still holds 3.
For input 0, the branch is also taken and the only output is 0. This boundary passes, but every positive permitted input stops before decrementing, so the altered program fails the intended full countdown.
A conditional branch must match the algorithm's stopping rule. BRZ recognises the exact zero boundary; BRP recognises a wider set of accumulator values under the stated convention.

Worked example

Resolve the same operand in four ways

Assume memory[20]=40, memory[23]=11 and memory[40]=9; index register = 3. Use one-address-unit elements.
Immediate operand 20 gives value 20. Direct operand 20 gives value 40. Indirect operand 20 first reads address 40, then reads value 9 there. Indexed base 20 uses effective address 23 and reads value 11.
Immediate addressing needs no data-memory read for its literal; indirect addressing in this model needs two. Actual caches and hardware can affect physical timing, so this is a conceptual lookup count.

Generic addressing modes; symbols defined in the text
Mode	Effective data address	Loaded value
Immediate #20	Literal; none	20
Direct 20	20	40
Indirect @20	40	9
Indexed 20 + index	23	11

Worked example

Recognise object behaviour

A base class Account defines a private balance and public deposit/withdraw operations. A SavingsAccount can inherit these and add an interest rate.
An overridden charge() can calculate different fees for SavingsAccount and BusinessAccount. Calling account.charge() through a common interface is polymorphic when the object's type determines the implementation.
The withdraw method checks amount and balance before changing state. This encapsulates the rule; merely writing balance in a class without controlled operations does not protect the invariant.

Original A-Level practice

7 original questions total 25 marks. Attempt each before opening the independently written indicative marking guidance.

Question 1

3 marks

Explain two reasons to use procedural subroutines and one risk of shared global variables.

Show solution and marking guidance

Indicative answer

1 mark: subroutines reuse a repeated operation.
1 mark: they divide work into independently understandable/testable components.
1 mark: global changes can affect unrelated operations and create hidden dependencies.

Question 2

3 marks

Trace the shown LMC program for input 7. State the output, saved result and a suitable upper boundary test.

Show solution and marking guidance

Indicative answer

1 mark: output is 9.
1 mark: RESULT contains 9 after STA.
1 mark: input 997 should produce/save 999 without overflow; input 998 is outside the stated precondition.

Question 3

3 marks

Show solution and marking guidance

Indicative answer

Input 3 outputs only 3 because BRP is taken before SUB (1).
Input 0 outputs only 0 because zero also satisfies the stated BRP condition (1).
All positive inputs stop on their first test, missing the smaller numbers down to zero; one passing zero boundary does not establish correctness (1).

Question 4

4 marks

Write an LMC program that inputs an integer 0–998, adds 1 and outputs the result, then stops.

Show solution and marking guidance

Indicative answer

1 mark: INP reads into ACC.
1 mark: ADD ONE uses a labelled mailbox ONE DAT 1.
1 mark: OUT displays ACC.
1 mark: HLT stops before the data mailbox. One valid sequence is INP; ADD ONE; OUT; HLT; ONE DAT 1.

Question 5

5 marks

Trace the countdown LMC program for input 2. Explain how its conditional and unconditional branches cooperate, including the input-zero boundary.

Show solution and marking guidance

Indicative answer

Output is 2,1,0 (1).
BRZ is not taken while ACC is positive, allowing SUB/STA to reduce COUNT (1).
BRA returns to LOOP to reload/output the updated value (1).
When zero is output, BRZ jumps to HLT before subtraction; COUNT remains zero (1).
Input zero outputs only zero and stops on the first test (1).

Question 6

4 marks

memory[10]=30, memory[14]=8, memory[30]=6 and index=4. Give the values loaded with operand/base 10 in all four modes.

Show solution and marking guidance

Indicative answer

1 mark: immediate gives 10.
1 mark: direct gives 30.
1 mark: indirect gives 6 from address 30.
1 mark: indexed gives 8 from address 10+4=14, under the stated unit-sized convention.

Question 7

3 marks

Bus inherits Vehicle and overrides describe(). Explain inheritance, encapsulation and polymorphism in this design.

Show solution and marking guidance

Indicative answer

1 mark: Bus reuses/extends Vehicle's attributes/methods.
1 mark: controlled methods/private state enforce valid changes, if defined; inheritance alone does not establish encapsulation.
1 mark: describe() selects Bus's overridden behaviour for a Bus object through the shared interface.

Specification and references

This guide addresses OCR H446 1.2.4(a–e); appendix 5d LMC instruction set. Check your examination year and the complete specification for the assessment scope.

Found an error? Email a correction.

Need help applying this to unfamiliar questions?

Use the free examples first, then explore one-to-one tuition if guided practice would help.

Explore tuition Email Michael